Semiconductor devices need to be tested at many different temperature conditions to meet quality concerns. Low temperature conditions during a semiconductor device test are obtained by cooling the semiconductor device using cold air or through contact with a test header that is maintained at a low temperature. Low temperature testing using conventional techniques can result in formation of frost. The frost is produced from moisture in the air and the low temperature of the test header. The frost can cause the semiconductor device to adhere to the test header. Detaching a stuck semiconductor device from the test header can damage a surface of the semiconductor device and/or the test header. Thus, frost formation can impact test stability, efficiency and throughput.
Existing techniques to remove the frost or suppress the frosting at low temperatures include dry air, physical separation, and temperature control. The dry air technique continuously pours dry air into the test room, which can decrease the relative humidity to suppress frost formation. However, as the test environment is generally not a closed space, the relative humidity is very difficult to keep constant. The frost suppression using dry air can be ineffective. The physical separation technique pushes out a separator through the test header. The test header has one or two holes. Through the holes, the separator can physically detach the semiconductor device from the test header. However, such a brute-force method of detaching the semiconductor device can break the device surface and, therefore, is not cost effective. The temperature control technique adopts test headers that are equipped with a heating scheme. The heating scheme can remove the frost on the test header and the semiconductor device. However, it takes longer to remove frost by heating and then cooling down the test system to continue the test, which can drastically increase the test duration. This is also not cost effective.
It would be desirable to implement a method for enhancing stability, robustness and throughput of semiconductor device test machines in low temperature conditions.